Computer architecture : a quantitative approach / created by John L. Hennessy and David A. Patterson.
Material type:
- text
- unmediated
- volume
- 9780128119051
- QA76.9.C643 HEN
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Main Library Open Shelf | QA76.9.C643 HEN (Browse shelf(Opens below)) | 163240 | Available | BK151472 | ||
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QA76.9.C55 MAR Mastering system center 2012 R2 configuration manager | QA76.9.C64 ROB Emergent computer literacy | QA76.9.C643 HEN Computer architecture : a quantitative approach / | QA76.9.C643 HEN Computer architecture : a quantitative approach / | QA76.9.C643 HEN Computer architecture : a quantitative approach / | QA76.9.C643 PAT Computer organization and design : | QA76.9.C643 PAT Computer organization and design : |
Includes bibliographic references and an index.
Fundamentals of quantitative design and analysis Memory hierarchy design Instruction-level parallelism and its exploitation Data-level parallelism in vector, SIMD, and GPU architectures Thread-level parallelism Warehouse-scale computers to exploit request-level and data-level parallelism Domain-specific architectures Appendix A. Instruction set principles ; Appendix B. Review of memory hierarchy ; Appendix C. Pipelining : basic and intermediate concepts Online appendices. Appendix D. Storage systems ; Appendix E. Embedded systems ; Appendix F. Interconnection networks ; Appendix G. Vector processors in more depth ; Appendix H. Hardware and software for VLIW and EPIC ; Appendix I. Large-scale multiprocessors and scientific applications ; Appendix J. Computer arithmetic ; Appendix K. Survey of instruction set architectures ; Appendix L. Advanced concepts on address translation ; Appendix M. Historical perspectives and references
Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook is fully revised with the latest developments in processor and system architecture. It now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC. True to its original mission of demystifying computer architecture, this edition continues the longstanding tradition of focusing on areas where the most exciting computing innovation is happening, while always keeping an emphasis on good engineering design. --publisher
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